发明名称 |
Microprocessor with operation capture facility |
摘要 |
The present invention provides a microprocessor with a special Operation Capture Facility (OCF) mechanism which enables "faulting" whenever there is (a) a memory access request to any one of a specified plurality of blocks of memory (b) a request to access any one of a plurality of specified I-O ports or (c) any one of a specified plurality of interrupts is activated. This OCF mechanism includes a plurality of special registers which store either (a) an I-O port address, (b) a memory address or (c) an interrupt number. Mask registers are provided which (1) mask bits in the special register, thereby providing the ability to fault on an entire block of I-O access requests or upon activation of any one of a block of interrupts and (2) indicate which type of interrupts should be faulted and to indicate whether I-O should be faulted on a byte, word or double word.
|
申请公布号 |
US5455909(A) |
申请公布日期 |
1995.10.03 |
申请号 |
US19920872913 |
申请日期 |
1992.04.22 |
申请人 |
CHIPS AND TECHNOLOGIES INC. |
发明人 |
BLOMGREN, JAMES S.;BRACKING, JIMMY;RICHTER, DAVID;SPAHN, FRANCIS |
分类号 |
G06F1/30;G06F1/32;G06F7/575;G06F9/455;G06F13/10;G06F13/12;G06F13/24;(IPC1-7):G06F11/00 |
主分类号 |
G06F1/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|