发明名称 Multiprocessor system having offset address setting
摘要 A multiprocessor system includes the first microcomputer (1) having the first memory (4); the second microcomputer (9) having the second memory (12), the dual port third memory (14), and an offset register (22); buses (18-20) for connecting the first and second microcomputers; an address setting unit (21) provided in the second microcomputer for composing an address value supplied by the first microcomputer and a value set in the offset register to feed address data to the third memory.
申请公布号 US5455920(A) 申请公布日期 1995.10.03
申请号 US19930163403 申请日期 1993.12.07
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MURAMATSU, KIKUO
分类号 G06F15/167;B60R16/02;B60R16/03;B60W50/00;G06F12/02;G06F15/16;G06F15/17;(IPC1-7):G06F9/26;G06F12/00 主分类号 G06F15/167
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