发明名称 INTEGRATED CIRCUIT LAMINATION PROCESS
摘要 <p>An integrated circuit includes a rigid substrate (130) formed of a dissolvable material layer which is in turn coated by a protective, insulating layer (136). Conductive posts (132) and an integrated circuit (140) are formed on the substrate (130) prior to dissolving the substrate (130) to expose top and bottom pads (144, 134) attached to opposite ends of the conductive posts (132). The top and bottom pads (144, 134) of a plurality of like integrated circuits are connected to provide interconnection of multiple dies in a stacked arrangement.</p>
申请公布号 WO1995026124(A1) 申请公布日期 1995.09.28
申请号 US1995001824 申请日期 1995.02.21
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