发明名称 Phase locked loop.
摘要 An improved phase locked loop utilizing control logic generated by a phase detector to eliminate sensitivity to uncorrelated noise when the loop is in lock. The phase locked loop comprises a differential filter (117) having first and second input lines. A logic element (115) is responsive to the locked state of the phase locked loop for connecting said first and second input lines together whereby uncorrelated noise is common-mode to the filter and, as such, does not affect the VCO (121) input. The phase locked loop is particularly useful in clock signal synthesis and in an IC used to display video signals. <IMAGE>
申请公布号 EP0674392(A1) 申请公布日期 1995.09.27
申请号 EP19950301251 申请日期 1995.02.27
申请人 DISCOVISION ASSOCIATES 发明人 JONES, ANTHONY MARK
分类号 H03K19/003;H03K17/687;H03L7/08;H03L7/089;H03L7/093 主分类号 H03K19/003
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