| 摘要 |
A process for dry etching a polysilicon layer or gate structure of an integrated circuit is achieved. More particularly, a process for overetching a polysilicon layer using, in place of a conventional chloride gas (e.g., CCl4), a fluorine gas, such as C2F6 or CF4 is disclosed. After the main etch step, a passivation formation step is performed where a mixture of helium and fluorine gases is flowed into a plasma etch chamber. Next, an overetch is performed by flowing a mixture of helium and chlorine gas. This process eliminates the need to use CCl4 or other harmful ozone containing gases in the overetch step. Moreover, an acceptable polysilicon sidewall profile is achieved and no undercutting of the polysilicon layer is experienced using this process.
|
