发明名称 Horizontal line counter insensitive to large phase shifts of video
摘要 PCT No. PCT/US92/04825 Sec. 371 Date Nov. 22, 1993 Sec. 102(e) Date Nov. 22, 1993 PCT Filed Jun. 15, 1992.A horizontal line counter (110,115,120) provides a signal (LINE #21) identifying the beginning of video data in a particular horizontal video line. The counter is clocked by multiple clock signals. A first clock signal (HOR PLS) clocks the counter until the line count value equals a known value that is less than the line number of the horizontal line that is to be identified. When the count value equals the known value, clocking by a second clock signal (COMP SYNC) is enabled. Although, the first clock source provides a regular pulse waveform suitable for clocking the counter reliably, transitions on the first clock signal may not accurately indicate the beginning of information within a horizontal line interval. Transitions on the second clock signal accurately indicate the beginning of the desired information. However, the waveform of the second clock signal may exhibit irregularities prior to the time at which clocking by the second clock signal is enabled that could adversely affect the reliability of the counter value. The combined clocking arrangement advantageously provides significantly higher reliability of the count value and improves the timing of the line identification signal with respect to the beginning of the desired video data.
申请公布号 US5453795(A) 申请公布日期 1995.09.26
申请号 US19930142421 申请日期 1993.11.22
申请人 THOMSON CONSUMER ELECTRONICS, INC. 发明人 TULTS, JURI
分类号 H04N5/10;H04N5/92;H04N7/035;H04N7/088;(IPC1-7):H04N7/087 主分类号 H04N5/10
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