| 摘要 |
<p>PURPOSE:To adjust the phase and the pulse width of a clock signal, which is distributed to respective elements in each of units constituting an information processor, with a high precision. CONSTITUTION:In the information processor where the clock signal is distributed from a clock generation unit 110 to load units 120 and each load unit 120 is provided with a load element 121 operated synchronously with the inputted clock signal, a delay means which delays the input signal in accordance with an inputted selective instruction is provided correspondingly to each load unit 120, and delay times of delay means 122 are measured correspondingly to individual forecast selective instruction, and the selective instruction corresponding to the delay time to be set is inputted to each delay means 122, and a reference phase signal having a prescribed phase deviation is generated based on the output of each delay means 122, and the phase of the clock signal distributed to the load element 121 of each load unit 120 is adjusted based on the phase of the reference phase signal.</p> |
