| 摘要 |
<p>PURPOSE:To reduce the circuit scale of a packet data comparator circuit for comparing the successively and serially inputted packet data of two systems. CONSTITUTION:In a latch circuit 11, the data for one packet of the packet data of a first system are fetched and outputted as serial data. The packet data of a second system are compared with the output serial data of the latch circuit 11 one by one packet by a comparator 12. The phase difference of the packet data by the first and second systems is detected by the compared result of each packet and the detected phase difference is adjusted. Thus, since the serial data are processed as they are and phases are compared, the circuit scale is made small.</p> |
