CRC APPARATUS OF BOUND AREA OF BITE SYNCRONIZED DATA

摘要

an N byte shift resistor for shifting byte columns to be decoded by N bytes; a compensation polynomial driver connected to the N byte shift resistor, fro driving a compensation polynomial, if a bit of the byte outputted from the N byte shift resistor is Bsxs; a compensation polynomial modulor 2 subtracter for modulor 2 subtracting data inputted in byte unit from an output terminal of the N byte shift resistor to output the result to a generator polynomial; and a compensation polynomial modulor 2 demultiplier for modulor 2 demultiplying data inputted in byte unit connected to an input terminal of the N byte shift resistor and the compensation polynomial modulor 2 subtracter to output the result to the compensation polynomial modulor 2 subtracter.