BIT LINE SENSE AMPLIFICATION CIRCUIT OF SEMICONDUCTOR MEMORY

摘要

a first bit line sense amplifier for amplifying a data signal of a cell selected by an address signal transmitted from a pair of bit lines and for transmitting the amplified data signal to a data line of a column sense amplifier; a second amplifier for amplifying the same data signal as the first bit line sense amplifier and for transmitting the amplified data to the pair of bit lines to refresh the cell; and a separate controller which is connected to the first bit line sense amplifier and to the second amplifier and is turned on/off according to application of a pulse, wherein the separate controller is turned on, if the pulse is applied, to transmit the amplified data in the first bit line sense amplifier to the data line and at the same time to transmit the amplified data in the second amplifier to the bit lines to refresh the cell.