发明名称 Simple temporary information storage circuit controllable with enable/reset signal.
摘要 Only a flip flop circuit (11a), an n-channel enhancement type transfer transistor (Qn11) coupled between an input node and the flip flop (11a) and a p-channel enhancement type reset transistor (Qp12) coupled between a power voltage line (Vcc) and the flip flop circuit (11a) form in combination a temporary information storage circuit, and the n-channel enhancement type transfer transistor (Qn11) and the p-channel enhancement type reset transistor (Qp12) are respectively controlled by a latch control signal (CTL2) and an enable/reset signal (EBL2) for changing the status of the flip flop circuit. <IMAGE>
申请公布号 EP0637132(A3) 申请公布日期 1995.09.20
申请号 EP19940111895 申请日期 1994.07.29
申请人 NEC CORPORATION 发明人 HIRATA, YUTAKA, C/O NEC CORPORATION
分类号 G11C11/413;G11C8/06;G11C8/10;G11C11/401;G11C11/407;G11C11/408;H03K3/037;H03K3/356 主分类号 G11C11/413
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