| 摘要 |
A data multiplexing system comprising a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplexer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus, under the controls of respectively corresponding bus control circuits. The high-speed multiplexer collects the primary multiplexed signals on the up bus lines of the plurality of data multiplexing buses, and further multiplexes the collected signals up to a predetermined signal level. Thereafter, it sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal so as to match the interface of a high-speed transmission line, and sends the resulting signal to the high-speed transmission line. In a data demultiplexing mode, the signal of the high-speed transmission line is processed by the high-speed interface module and the high-speed demultiplexer, and the resulting signals are distributed through the down bus lines of the data multiplexing buses so as to send the low-speed digital signals to the low-speed transmission lines.
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