发明名称 |
DATA OUTPUT BUFFER OF SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE |
摘要 |
The memory device performs read/write operation according to the clock supplied from an external source, and comprises: a memory means for storing a data; a data output buffer means for outputting the stored data in response to a control signal of the data output buffer; and a control signal generating means controlling the data output buffer according to an address strobe signal and a predetermined combination signal in response to a clock signal and an address strobe signal or their combination signal. The address strobe signal is either or both a row address strobe signal and a column address strobe signal.
|
申请公布号 |
KR950010564(B1) |
申请公布日期 |
1995.09.19 |
申请号 |
KR19920018133 |
申请日期 |
1992.10.02 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, MO - CHOL |
分类号 |
H01L27/10;G11C7/00;G11C7/10;G11C7/22;G11C11/407;G11C11/409;(IPC1-7):G11C7/00;H03K19/00 |
主分类号 |
H01L27/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|