| 摘要 |
PURPOSE:To constitute simply a circuit converting one-sample one-bit binary signals to one-sample N-bit length ternary serial signals, by utilizing sampling synchronizing signals from a succeeding digital processor. CONSTITUTION:Sampling synchronizing signal a from a digital filter and a one- sample one-bit binary signal are inputted from terminal P3 and terminal P1 respectively, and sampling is performed at the timing of signal a by D-type FF11 to output signal (d). Signal (d) is separated into odd-numbered signals and even-numbered signals by inverter 12, circuit 13 dividing a frequency into two, and AND gates 14 and 15, thereby obtaining signals (e) and (f). Meanwhile, signal (b) is obtained by delaying signal a in shift register 16, and this signal (b) and signal (a) are inputted to SR-type FF17, and signal (c) from (Q) terminal and signals (e) and (f) are caused to pass through AND gates 18 and 19 and OR gate 20, and ternary signal (g) of 1, 0, and -1 is outputted to output terminal P2. |
