发明名称 Sampling phase extracting circuit
摘要 Correlation signals between the residual intersymbol interference, which is the difference signal between the input and output signals of the decision circuit, and the result of decision is cumulatively added by an integrator. The result of the integration is sampled by a sampler at every NT. A phase control circuit, whose input is the difference signal between the sampled signal and the previous integration result, adaptively controls the phase renewal quantity during training in accordance with the codes of the aforementioned two input signals. The above-described configuration makes it possible to reduce the convergence time of the decision feedback equalizer to about 1/2 of that taken by the conventional process, and manifests a significant effect in satisfying the requirement for the warm start in training, prescribed for the set-up mode of the system.
申请公布号 US5450457(A) 申请公布日期 1995.09.12
申请号 US19930119396 申请日期 1993.09.13
申请人 NEC CORPORATION 发明人 ITO, TOMOKAZU;SUGIYAMA, AKIHIKO
分类号 H04B3/10;H04L7/02;H04L25/03;(IPC1-7):H04L7/00 主分类号 H04B3/10
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