| 摘要 |
A protective device for protecting a CMOS circuit included in an internal circuit of an IC against overvoltage applied to a power source wiring and preventing the CMOS from being latched-up by surge voltage due to external noise during a normal operation of the IC is disclosed. An N channel MOS FET and a P channel MOS FET are arranged in parallel to each other and connected between a power source wiring and a ground wiring. Gate electrodes of the N channel and the P channel MOS FETs are connected to the ground wiring and the power source wiring, respectively. Positive overvoltage or surge voltage applied to the power source wiring is relieved by breakdown of drain junctions of both the MOS FETs.
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