发明名称 Compiler with delayed conditional branching
摘要 An optimization method or apparatus adapted for use on a compiler for generating machine code optimized for a pipeline processor. A compute-compare-branch sequence in a loop is replaced with a compare-compute-branch sequence. A compute-compare-branch sequence is a sequence of instructions to compute the value of one or more variables, execute a comparison involving the variables, and execute a conditional branch conditioned on the comparison. In the compare-compute-branch sequence, the instructions of the compute-compare-branch sequence are reordered as follows. First, the comparison is executed. In the compare-compute-branch sequence, the comparison involves previously set values of the variables. Second, the computation is executed to compute the current values of the variables. Finally, the conditional branch conditioned on the latter comparison is executed so as to have the effect of executing during the previous execution of the sequence. One or more temporary variables store the previous values of the variables. They are set to the values of the variables at the end of the compare-compute-branch sequence. Before execution of the loop, the temporary variables are set so that the condition will not be met the first time the sequence executes. After execution of the loop, a comparison and a conditional branch are executed. The comparison involves the temporary variables, and the conditional branch is conditioned on the comparison.
申请公布号 US5450585(A) 申请公布日期 1995.09.12
申请号 US19910700727 申请日期 1991.05.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 JOHNSON, MARK A.
分类号 G06F9/45;(IPC1-7):G06F9/44 主分类号 G06F9/45
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