发明名称 SCAN FLIP-FLOP WITH POWER SAVING FEATURE
摘要 <p>A flip-flop has both a system output (55, 95, 145) and a scan output (56, 96, 146). A system output signal for the flip-flop is placed on the system output (55, 95, 145). When the flip-flop is in a normal operating mode, a scan output signal on the scan output (56, 96, 146) is held at a static logic level. When the flip-flop is in a scan mode, the scan output signal on the scan output (56, 96, 146) transitions between logic 1 and logic 0 synchronous with transitions of the system output signal on the system output (55, 95, 145).</p>
申请公布号 WO1995023976(A1) 申请公布日期 1995.09.08
申请号 US1995000614 申请日期 1995.01.18
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