| 摘要 |
The logic gate (1a) has two binary inputs (a,b). The inputs are passed through a HEMT transistor compensating delay circuit (13a, 13b). The outputs (a1,b1) from the delay circuit are each passed to a NOR gate (12a,12b). The inputs are also passed to another NOR gate (11) producing a binary output (A1). The output is applied across the first NOR gate. The common output (A) from the second NOR gate provides the OR-Exclusive binary function. |
