发明名称 FRAME PULSE GENERATOR
摘要 PURPOSE:To shorten a time until the abnormality of a reception clock signal is detected after it is generated in a frame pulse generator. CONSTITUTION:A signal processing circuit 16 performs signal processing by using a clock signal and a frame pulse signal generated based on the clock signal. A clock generating part 12 generates the clock signal, and also, generates an alternating signal provided with a prescribed alternating component based on the clock signal. A signal processing part 22 receives the alternating signal. and also, receives the clock signal as the reception clock signal, and generates the frame pulse signal, and also, acquires a timing period signal by sampling the timing period of the frame pulse signal, and detects the abnormality of the reception clock signal corresponding to the timing period signal and the frame pulse signal.
申请公布号 JPH07235953(A) 申请公布日期 1995.09.05
申请号 JP19940024294 申请日期 1994.02.22
申请人 NEC CORP 发明人 TANABE TOSHIYA
分类号 H04L25/38;G06F1/04;H04L7/08 主分类号 H04L25/38
代理机构 代理人
主权项
地址
您可能感兴趣的专利