发明名称 |
Screening of conductors and contacts on microelectronic devices |
摘要 |
A method is disclosed for testing or screening metal or polysilicon conductors and contacts on microelectronic devices that it uses a modified design layout for individual logic gates to enable high current density testing of all such elements used in the final functional circuit. The method uses a special metal pattern adding metal conductor paths to enable high current testing of normal conductors and contacts at an intermediate point during fabrication. The metal layer is patterned a second time to remove the high current paths and enable functional operation. This allows burn-in and screen testing to be performed at higher current densities than would otherwise be possible.
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申请公布号 |
US5448179(A) |
申请公布日期 |
1995.09.05 |
申请号 |
US19940278534 |
申请日期 |
1994.07.12 |
申请人 |
THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE |
发明人 |
BURNS, DANIEL J. |
分类号 |
G01R31/28;(IPC1-7):G01R31/26 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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