发明名称 TEST POTENTIAL TRANSFER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE USING THIS CIRCUIT
摘要 PURPOSE:To eliminate the need for a booster circuit so as to greatly reduce a chip area by providing a test control pad, a test signal pad, a high potential detection circuit, a level shift circuit and a MOS transistor. CONSTITUTION:High electric potential is applied to a test control pad 31 during a test, and test potential whose signal level is higher than source potential is applied to a test signal pad 32 during the test. A drive signal Vdrv is supplied to the gate of a transistor Q3 and the test potential applied to the pad 32 is introduced into the transistor as Vtest. This constitution allows a test control signal for use in controlling a test mode to be generated by detection of high voltage inputted from outside a chip. Also, the high voltage is used as the power supply of a level shift circuit 2; that is, the high voltage applied from the outside is used as both signal and power supply, so the need for a booster circuit is eliminated, resulting in great reduction in the chip area.
申请公布号 JPH07234265(A) 申请公布日期 1995.09.05
申请号 JP19940027103 申请日期 1994.02.25
申请人 TOSHIBA CORP 发明人 SUGIURA YOSHIHISA;IWATA YOSHIHISA;IMAMIYA KENICHI
分类号 G01R31/28;G11C11/40;G11C11/401;G11C11/407;G11C29/00;G11C29/06;G11C29/12;G11C29/14;G11C29/46;H01L21/66;H01L21/822;H01L27/04;H01L27/10;(IPC1-7):G01R31/28 主分类号 G01R31/28
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