DRAM-WITH SELF CONTROL CIRCUIT OF SENSE-AMP

摘要

The enable time of a sense amplifier is controlled by the sense amp control circuit equipped in a DRAM so that the processing speed is increased. The DRAM includes memory cell arrays comprising memory cell blocks connected to word lines, sense amp arrays connected to the bit lines of the memory cell array blocks to detect the data stored in the memory cell, and enable circuits for driving sense amp array according to control signal transmitted from a dummy cell array.