发明名称 Semiconductor electrode manufacture for MOSFETs
摘要 The amorphous silicon layer (22) is doped with phosphorous to a doping level of 7x10E20 atoms/cubic cm twice that of the solid phase solubility of phosphorous. The layer is layed on top of an FET junction layout (1,2). Intermediate structure lays between the film are etched with HF, leaving the wing films exposed. A film of SiNx (29) 6nm thick is then formed. A layer of amorphous silicon (30) doped to 7x10E20 atoms/cubic cm 100nm thick and a BPSG layer (32) are then added. The connection opening (33) is then coated with aluminium, to form the electrode.
申请公布号 FR2716749(A1) 申请公布日期 1995.09.01
申请号 FR19940015177 申请日期 1994.12.16
申请人 FUJITSU LTD 发明人 SUGAWARA SHIGEKAZU (C/O FUJITSU LIMITED)
分类号 H01L21/28;H01L21/316;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L29/78 主分类号 H01L21/28
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