A multilayer resist pattern prodn. process involves (a) producing an alignment marking on a silicon substrate provided, on its surface, with a cell portion having several cell patterns with steps; (b) depositing a lower deposited film on the substrate and then applying a lower resist film which is exposed and developed to produce a secondary alignment marking; (c) producing an insulating interlayer over the lower resist film and then applying an upper resist film to produce a multilayer resist film; (d) exposing the upper resist film to form highly etchable and poorly etchable regions; (e) silylating the resulting structure to form a silylated layer on the upper resist film; (f) etching away the highly etchable region to produce an upper resist pattern and removing the silylated layer; (g) patterning the interlayer using the upper resist pattern as mask; and (h) etching the lower resist film, using the patterned interlayer as mask, to produce a multilayer resist pattern.
申请公布号
DE4410274(A1)
申请公布日期
1995.08.31
申请号
DE19944410274
申请日期
1994.03.24
申请人
GOLDSTAR ELECTRON CO., LTD., CHEONGJU, KR
发明人
LEE, JUN SEOK, SEOUL/SOUL, KR;HUR, HUN, SEOUL/SOUL, KR;SONG, YOUNG JIN, SEOUL/SOUL, KR