发明名称 |
Decoder circuit for phase modulated signals |
摘要 |
A decoder circuit (21) and method for providing an amplitude compensated signal by removing the undesired effect of amplitude modulation on a phase modulated signal. The decoder method is provided by demodulating a received inphase receive signal component (10) and quadrature receive signal component (12) of the phase modulated signal and outputting an amplitude varying signal (15) to a feedforward automatic gain control circuit that outputs an amplitude compensated signal (38). The feedforward automatic gain control circuit comprises a detector circuit (16), an offset bias circuit (32), a differencer circuit (30) and a gain control circuit (28). The detector circuit (16) outputs a DC signal (17) representing an amplitude of the inphase receive signal (10) and the quadrature receive signal (12). The offset bias circuit (32) provides a constant current bias (29) to the DC signal (17) thus creating a control signal 31. The gain control circuit (28) receives the control signal (31) and the amplitude varying signal (15) and outputs an amplitude compensated signal (38).
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申请公布号 |
US5446761(A) |
申请公布日期 |
1995.08.29 |
申请号 |
US19930074525 |
申请日期 |
1993.06.11 |
申请人 |
MOTOROLA, INC. |
发明人 |
NAG, MANBIR;HECK, JOSEPH P. |
分类号 |
H03D3/00;H03G3/30;(IPC1-7):H03D3/00;H03K9/06 |
主分类号 |
H03D3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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