发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To prevent voltage drop at a remote side from a power source supply end and to surely perform operation in each memory cell in the direction of a row by dividing a common power source line and connecting them through a power source voltage supplying means performing an amplifying function. CONSTITUTION:Divided points of divided power source lines 2a, 2b to which a common power source line 2 is divided are connected to a power source voltage supplying means 11. The means 11 is constituted by connecting a CMOS inverter 11a and 11b in cascade, a PMOS transistor is arranged at a power source Vcc side, and a Vcc level is obtained at an output end of the CMOS inverter. A potential holding means 12 is connected to a power source line 2a between a fuse 4 connected to a supply terminal 3 of the Vcc and a memory cell 1. The Vcc level is continuously supplied to the means 12 from the terminal 3 through the fuse 4 in a state in which the fuse 4 is not cut, and a node 12b is made a ground level. On the other hand, when a defect of leakage is detected in either of the cell 1, the fuse 4 is cut, and a defective cell is substituted with a redundant cell.
申请公布号 JPH07230699(A) 申请公布日期 1995.08.29
申请号 JP19940020984 申请日期 1994.02.18
申请人 TOSHIBA CORP 发明人 SUZUKI YOICHI;SEGAWA MAKOTO
分类号 H01L21/82;G11C29/00;G11C29/04;H01L21/8246;H01L27/112 主分类号 H01L21/82
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