发明名称 DIRECT CONVERTING RECEIVER
摘要 PURPOSE:To provide a demodulating system corresponding to high-speed data transmission by constituting a miniaturized and low-priced FSK receiver suitable for the configuration in an integrated circuit with less power consumption concerning an FSK demodulator used for the receiver of radio communication. CONSTITUTION:IQ signals 38 and 39 provided by direct converting reception of FSK modulation are supplied to a demodulating means 1 and a frequency detecting means 4; an output signal 2 is supplied to a clock synchronizing means 6; and a code deciding means 9 after its waveform is shaped by a low-pass filter 3. The frequency detecting means 4 detects the frequency offset amount of a local oscillator 34 by detecting the frequency changes of the IQ signals 38 and 39, decides the delay amount of a signal delay means 8, decides a code due to a code deciding point behind a symbol at a code deciding means 9 while using a clock signal 7 of that delayed clock synchronizing means 6, and gets the demodulated result.
申请公布号 JPH07231338(A) 申请公布日期 1995.08.29
申请号 JP19940022273 申请日期 1994.02.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIMURA MASAHIRO;KISHIGAMI TAKAAKI;HASEGAWA MAKOTO;TANAKA SEIYA
分类号 H04L27/14 主分类号 H04L27/14
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