Crosstalk verification device

摘要

A crosstalk verification device for preventing cross talk of an LSI layout pattern. An error extracting portion (17) which, referring to the contents of a design rule file (12) and a crosstalk noise reference voltage storing portion (18), processes coordinate data of an output wiring pattern in an output wiring pattern file (16) to determine a wire-to-wire capacitance of an overlap/parallel portion between an output wire of a transistor prone to exert crosstalk influence and an output wire of a transistor susceptible to crosstalk. The error extracting portion (17) then calculates the magnitude of crosstalk noise as a function of the wire-to-wire capacitance to specify a portion in which the magnitude of crosstalk noise exceeds reference voltages. The specified coordinate data is applied as error information to an error file (19). The crosstalk verification device having such arrangements provides for automatic verification of the presence/absence of a portion in which there is a danger that crosstalk may occur.