NON-VOLATILE SEMICONDUCTOR MEMORY

摘要

PURPOSE:To suppress injecting electrons into a non-selection cell by applying low voltage to a selecting gate to which a non-selection cell belongs at the time of write-in and cutting off the selecting gate. CONSTITUTION:Selecting gates SG are respectively provided at both ends of plural memory cells connected in series to which each control gate CG is connected. Bit lines BL being a column line side are selected and controlled by a column decoder 13 through a data latch/sense circuit 11, a column gate 12. A selecting gate SG being a row line side and a control gate CG (word line) are selected and controlled by a row decoder 14. A booster circuit 15 generates high voltage for a substrate and a source line at the time of erasing and high voltage for a control gate at the time of write-in, a low voltage switching circuit 16 generates low voltage cutting off the selecting gate SG as prohibiting operation for write-in.