| 摘要 |
<p>The circuit includes a double access memory system (10) connected through busses to systems for writing data in an initial order and for reading the data in a predetermined final order. A control register (14) allows memory read operations only when its content is non-zero. The register has its contents decremented at each read operation and incremented by 1 plus the difference between the rank of the input data and the rank of the output data, or zero if the difference is negative. Output data can be read even if all the input data is not available.</p> |
