发明名称 Multi-processor module.
摘要 <p>A multi-processor module (33) for use in a solid-state interlocking system for a railway network includes a first processor for receiving instructions concerning the operation of parts of the trackside equipment (40) within the network and carrying out those instructions in dependence upon the current overall status of that trackside equipment, and a second processor for receiving the instructions from the first processor and effecting the operation of the appropriate trackside equipment via a data link. The first processor runs at a higher clock speed than the second. A program run in the first processor is arranged to be slowed down in those areas which interface with the second processor. The slowing down may be effected by the inclusion of delay loops, no-operation instructions, or by the increasing of time constants in timing hardware. &lt;IMAGE&gt;</p>
申请公布号 EP0668204(A1) 申请公布日期 1995.08.23
申请号 EP19950300671 申请日期 1995.02.02
申请人 GEC ALSTHOM SIGNALLING LIMITED 发明人 COOPER, MARK EDWIN;PLATT, CHRISTOPHER MARTIN
分类号 B61L19/06;B61L27/00;(IPC1-7):B61L19/06 主分类号 B61L19/06
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