发明名称 Method and apparatus for evaluating the system margin of a digital transmission system.
摘要 An evaluator (1) for evaluating a digital transmission system is provided which comprises a single power decrease detector (12, 12a, 12b) and a system margin evaluator (14, 14a, 14b, 14c). The signal power decrease detector receives a digital signal (DR, SDR) which has been transmitted through the transmission medium of a transmission system so as to generate a signal power decrease signal (PD, FC). The system margin evaluator evaluates the system margin of the transmission system in response to the signal power decrease signal. The system margin of the digital transmission system can be evaluated in a simple and convenient manner. <IMAGE> <IMAGE>
申请公布号 EP0668677(A1) 申请公布日期 1995.08.23
申请号 EP19950301051 申请日期 1995.02.20
申请人 LEADER ELECTRONICS CORP. 发明人 IMAMURA, GENICHI
分类号 H04L25/02;H04B3/48;H04L1/24 主分类号 H04L25/02
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