发明名称 COINCIDENCE DETECTION OUTPUT CIRCUIT FOR MULTI-FRAME DATA
摘要 <p>PURPOSE:To provide a coincidence detection output circuit for multi-frame data whose processing time is short without the need for data transfer with respect to the coincidence detection output circuit for multi-frame data outputting an output of the multi-frame data when same multi-frame data are consecutive for n-times in the case of reception of the multi-frame data of multi-frame configuration where m-frame is equal to 1 multi-frame. CONSTITUTION:RAMs are formed to be of double buffer configuration and both RAMs 1, 2 are used to detect the coincidence of multi-frame data where m-frames are equal to 1 multi-frame simultaneously over all frames, a data mis-match detection circuit 5 always monitors outputs of m-frame coincidence detection circuits 3, 4 to compare data coincidenct consecutively for n-times in the unit of multi-frames with data coincident consecutively for n-times newly thereby detecting dissidence thereby outputting multi-frame data.</p>
申请公布号 JPH07226731(A) 申请公布日期 1995.08.22
申请号 JP19940018762 申请日期 1994.02.16
申请人 FUJITSU LTD 发明人 OGATA HIROKI;NARAHIRA SADAO;KAWABE KAZUNORI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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