发明名称 CIRCUIT AND METHOD FOR DETECTION OF SYSTEM RESET CAUSED BY TURNING-ON OF POWER SUPPLY OF ELECTRONIC SYSTEM
摘要 <p>PURPOSE: To provide a detection circuit for system reset caused by turning on the power source of an electronic system in order to prepare a power source detection circuit which will not be affected by the excessive use of power supply. CONSTITUTION: This detection circuit is provided with the following means of a latch means 110 which has a SET input and an output and is connected to a power source, feedback means for receiving the output of the latch means and the system reset so as to reset the output into a 1st predetermined state during the on of power supply, and delay means 501 connected to the output of the feedback means 190 and the latch means so as to activate the output of the latch means when both the 1st state of that output and the system reset exist. After the lapse of prescribed time from the reception of activated output from the feedback means, that output is activated. Thus, when only the system reset exists without turning on the power source, the latch means is set to a 2nd prescribed state so that the feedback means can still be inactive.</p>
申请公布号 JPH07219681(A) 申请公布日期 1995.08.18
申请号 JP19940304515 申请日期 1994.12.08
申请人 ROCKWELL INTERNATL CORP 发明人 RAJIIBU GUPUTA;RAOFU HARIMU;DARIYUUSHIYU SHIYAMUROU
分类号 G06F1/24;G06F1/30;(IPC1-7):G06F1/24 主分类号 G06F1/24
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