发明名称 |
ASSOCIATIVE MEMORY AND DATA PROCESSOR |
摘要 |
PURPOSE:To provide a technology to surely relieve an associative memory or an LSI including this associative memory. CONSTITUTION:A memory line valid/invalid flag generating part 103 and an AND circuit 111 serve as the means which invalidate the deciding result of an address comparing part 102 based on the information on a defective part. Even if the presence is decided for such an address that is inputted for a searching purpose, the operation is limited to read the data out of a data storage means by invalidating such deciding result. Thus it is possible to relieve an associative memory including such a defect that cannot be relieved in a redundant constitution. |
申请公布号 |
JPH07219846(A) |
申请公布日期 |
1995.08.18 |
申请号 |
JP19940026151 |
申请日期 |
1994.01.28 |
申请人 |
HITACHI LTD |
发明人 |
KUWATA MAKOTO;MORI KAZUTAKA |
分类号 |
G06F15/78;G06F12/08;G11C15/04;G11C29/04 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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