发明名称 DIGITAL RADIO EQUIPMENT TERMINAL
摘要 PURPOSE:To obtain a stable operation and realize power saving by selecting an impedance element which is almost equal to the input impedance of the PLL frequency synthesizer at burst timing at non-burst timing. CONSTITUTION:By the switch of the load changeover switch 240 connected with a PLL frequency synthesizer 224, a resistor 250 as a buffer amplifier 223 or an impedance element is selectively connected with the PLL frequency synthesizer 224. In this case, the changeover switch 240 performs a switch operation by the control command of a control part, connects the PLL frequency synthesizer 224 with a buffer amplifier 223 at the burst timing of a first slot to be used in transmission/reception of a period for transmission and a period for reception, for instance, and connects the synthesizer with the resistor 250 at the non-burst timing other than this.
申请公布号 JPH07221668(A) 申请公布日期 1995.08.18
申请号 JP19940012418 申请日期 1994.02.04
申请人 CASIO COMPUT CO LTD 发明人 SHIBATA SHO
分类号 H04B1/40;H04B1/26;H04B7/26;H04J3/00 主分类号 H04B1/40
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