发明名称 |
HIGH-VOLTAGE CMOS TRANSISTORS FOR A STANDARD CMOS PROCESS |
摘要 |
A low-voltage 0.8-micron CMOS process is modified by implanting arsenic or phosphorus during epitaxy in a p-type substrate (14) starting material to increase the depth of selected n-well areas (16) for the purpose of producing high-voltage transistors on the same substrate in the same CMOS process. Implanting boron in a p-field extension area (18) through partially formed field oxide insulators (24, 26) so that the diffusion of boron beyond the p-field extension area (18) is minimized, achieves a similar result. That is, breakdown and punch-through voltages are increased. Together, these make CMOS transistors which operate at a higher voltage range than either innovation alone. |
申请公布号 |
WO9522174(A1) |
申请公布日期 |
1995.08.17 |
申请号 |
WO1994US10843 |
申请日期 |
1994.09.26 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
GAFFUR, HUSAM;YOON, SUKYOON |
分类号 |
H01L21/336;H01L27/088;H01L27/092;H01L29/10;H01L29/78 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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