摘要 |
<p>A high-speed solid state buffer circuit and method for producing the same. A buffer circuit (200) accepts logic input signals (IN) and transforms the signals to an output signal (OUT) which can drive a heavy load. By using an output stage pull-up device that includes a parallel combination of an enhancement mode FET (240) and a depletion mode FET (242), a solid-state buffer circuit (200) with increased speed and output voltage swing is achieved. Most conveniently, the buffer takes the form of a logic inverter. However, the buffer can also be used to form a multiple input NOR gate. The circuit is most suitable for GaAs technology.</p> |