| 摘要 |
The architecture of the coder is a number of vector comparators (QV1,QV2..QVn) in parallel. Waves of vectors (W1..Wi) are applied to the comparators as well as the input vector signal (Xi). A series of steps are then carried out to find the dictionary digital word corresponding to the vector signal. Starting with the least significant bit, all the weights are found to be zero, except for one where a distance separation is found. This allows elimination of one dictionary vector. The process of elimination proceeds until one of the dictionary vectors, say W2 is chosen. The address of W2 is then calculated (CA) and transmitted (ADW2). |
