发明名称 LOW POWER CONSUMPTION DYNAMIC RAM
摘要 The RAM reduces power consumption at the data retention mode. The RAM includes a column address buffer, a column address pre-decoder, an address detector, a pre-charge control signal generator which makes disable the pre-charge control signal /PC by the output signal CBR of bar detector at the reflash cycle, the normal disable signal generator which makes enable the spare Y-decoder.
申请公布号 KR950009170(B1) 申请公布日期 1995.08.16
申请号 KR19920010992 申请日期 1992.06.24
申请人 HYUNDAI ELECTRONICS & INDUSTRIES CO., LTD. 发明人 OH, JONG - HUN;KIM, YONG - HUI
分类号 G11C11/407;(IPC1-7):G11C11/407 主分类号 G11C11/407
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