发明名称
摘要 <p>PURPOSE:To reduce the power consumption by providing a direct memory access(DMA) function and a function which decides the head and tail of a transfer block on a circuit and stopping the clock of a CPU in communication operation. CONSTITUTION:The peripheral circuit of the CPU 1 of the portable information device consists of a CPU clock oscillation control circuit 3, an interrupt control circuit 4, a bus control circuit 5, a DMA circuit 6, a serial communication circuit 7, and a flag decision circuit 8 and a communication is made even unless the CPU is in operation. Namely, a flag decision circuit 8 judges the start and end of reception during the reception and data which are received by a serial communication circuit 7 and the DMA circuit 6 are stored in a memory. The data are sent automatically by the DMA circuit 6 and serial communication circuit 7. Therefore, the communication is possible even unless the CPU 1 operates and a bus control circuit 5 and a CPU clock control circuit 3 stop the clock of the CPU 1 when the CPU 1 is not in operation. Consequently, the power consumption is reduced.</p>
申请公布号 JPH0776893(B2) 申请公布日期 1995.08.16
申请号 JP19890066845 申请日期 1989.03.17
申请人 发明人
分类号 G06F13/28;G06F1/04;(IPC1-7):G06F1/04 主分类号 G06F13/28
代理机构 代理人
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