| 摘要 |
Briefly, in accordance with one embodiment of the invention, an electrical circuit comprises: a digital-controlled oscillator. The digital-controlled oscillator includes an edge delay oscillator being adapted to produce digital oscillator pulses in response to digital clock pulses, each of the oscillator pulses having a rising edge and a falling edge. The edge delay oscillator is further adapted to delay at least one of the oscillator pulse edges in response to a delay signal. In accordance with another embodiment of the invention, an electrical circuit comprises: a digital-controlled oscillator, the oscillator including a clock having a substantially predetermined frequency. The oscillator is adapted to produce a digital output signal comprising a series of digital output pulses. The oscillator is further adapted to modify the digital output signal so that at least one digital output pulse is adjusted in phase relative to the immediately preceding digital output pulse by approximately one-half period of the substantially predetermined frequency. In accordance with yet another embodiment of the invention, a method of reducing the phase-quantization for a digital output signal comprises the steps of: producing a first series of digital pulses at a substantially predetermined frequency, each of the first series digital pulses having a rising edge and a falling edge; producing a second series of digital pulses at the substantially predetermined frequency, each of the second series digital pulses having a rising edge and a falling edge, the second series being out of phase with respect to the first series, one of the edges of at least one of the digital pulses in the second series being delayed by approximately at least one-half period of the substantially predetermined frequency; and combining the second series including the at least one edge-delayed pulse with the first series to thereby provide the digital output signal having reduced phase quantization.
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