发明名称 Pulse generator and demodulator with controlling processor and decrementing counters
摘要 A central processing unit (CPU) and a dedicated pulse generating and demodulating logic circuit are used to both generate and demodulate a wide variety of pulse signals. Although the CPU exercises general supervision of the dedicated logic circuit, the circuit is arranged to perform most operations independently. Counters, registers and controlling logic generate a pulse stream. This same circuit, with the addition of edge detectors, demodulates (learns) the characteristics of an existing pulse signal in order to be able to generate a replica of that existing signal. An example application of the circuit is with television and other electronic equipment remote control units that include a learning capability.
申请公布号 US5442796(A) 申请公布日期 1995.08.15
申请号 US19920855246 申请日期 1992.03.23
申请人 ZILOG, INC. 发明人 ZASTROW, LYN R.;GOODHART, JAMES L.
分类号 H03J1/00;(IPC1-7):G06F3/023;G06F7/62;G06F15/20 主分类号 H03J1/00
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