| 摘要 |
PURPOSE:To provide an access circuit for dual port RAM realizing operation in which MPU and a data processing circuit specify mutually different storage areas among the bi-sected storage areas of dual port RAM by hardware, and preventing MPU and the data processing circuit from write-operating in the same storage area at the same time. CONSTITUTION:First and second specifying signals S10 and S11 each specifies a storage area different from the storage area specified last time between the first and second storage areas of dual port RAM 1, that is, the specification is performed contrary to the last time when a changeover timing signal S8 is supplied from the data processing circuit 3 while a first changeover instruction signal S7 is supplied from an arithmetic processing means 2. The first and second specifying signals S10 and S11 are supplied from a control means 4 to the bit terminal of one of address terminals AD1 and AD2 supplied with the address diginals AS1 and AS2 of n-bits of dual port RAM 1. |
