发明名称 SAMPLING CLOCK GENERATING CIRCUIT FOR VIDEO EQUIPMENT
摘要 PURPOSE:To generate a sampling clock for optimum A/D conversion for even an unknown video signal in the video equipment applying A/D conversion to a video signal. CONSTITUTION:The sampling clock generating circuit is made up of a pulse width measurement circuit 6 measuring the pulse width of a video signal, an MPU 4 measuring a frequency or a period of a synchronizing signal, and a clock generating circuit 3 to generate the sampling clock of an A/D converter circuit 1, and the pulse width measurement circuit 6 measures the pulse width of the video signal and the MPU 4 calculates frequency division information N.
申请公布号 JPH07212616(A) 申请公布日期 1995.08.11
申请号 JP19940006274 申请日期 1994.01.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUMOTO YOSHIAKI
分类号 H04N5/06;H03L7/08;H04N5/14 主分类号 H04N5/06
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