Method of making truly complementary and self-aligned bipolar and CMOS transistor structures with minimized base and gate resistances and parasitic capacitance

摘要

A truly complementary bipolar transistor structure and a combined bipolar and CMOS transistor structure are disclosed, each including a silicide layer formed upon a substrate that acts as an extrinsic base and gate. Optionally, a layer of polysilicon can be formed between the silicide layer and the substrate. An oxide layer (LTO) is formed or deposited over the silicide layer by chemical vapor deposition (CVD). Selected regions are defined and etched using a photoresist layer. Subsequent steps of implanting, etching and metalization are performed to produce transistors with reduced gate and extrinsic base resistances. Polysilicon may be used, instead of metal, as a contact in one embodiment of the invention.