发明名称 A plurality of passive elements in a semiconductor integrated circuit in which passive elements are arranged
摘要 A method consists of the steps of depositing a Ti-Pt metal film on a SiN layer insulation film mounted on GaAs substrate, etching the Ti-Pt metal film to form a first metal layer, depositing a SrTiO3 insulating film, etching the SrTiO3 insulating film to form an insulating film, depositing a WSiN metal film according to a sputtering technique while controlling a deposition pressure of nitrogenous gas, etching the WSiN metal film to simultaneously form a second metal layer on the insulating film and a thin metal film resistive element on the SiN layer insulation film, depositing a SiO2 passivation film, and making via holes. SrTiO3 has a high relative dielectric constant, and WSiN has a high melting point. Nitrogen atoms in WSiN prevent oxygen atoms in the insulating film from diffusing into the second metal layer. The adhesion of second metal film to the insulating film is tight because of the sputtering technique. The resistance of the thin metal film resistive element is stable because of nitrogen atoms strongly bonded to tungsten atoms and silicon atoms.
申请公布号 US5440174(A) 申请公布日期 1995.08.08
申请号 US19930073907 申请日期 1993.06.09
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 NISHITSUJI, MITSURU
分类号 H01L21/70;H01L27/06;(IPC1-7):H01L23/48;H01L29/40;H01L27/02;H01L29/68 主分类号 H01L21/70
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