| 摘要 |
<p>PURPOSE:To improve the cache hit rate of the microprocessor. CONSTITUTION:This microprocessor is equipped with EXU101, EAG102, IDU104, ACU105, DCU106, MNUI1101, DCHE1102, and main storage 108. Data of low frequency of access are registered in a cache memory and data of high frequency of access are expelled from the cache memory to prevent the hit rate of the cache memory from decreasing. In addition to the function, this microprocessor is equipped with a function which improves the hit rate of the cache memory even for the data of low frequency of access by registering the data in the cache memory when an area where the data should be registered is free.</p> |
