| 摘要 |
<p>PURPOSE:To enable stable memory access to be performed by providing a gate potential control circuit and adjusting a reference voltage outputted from a dummy cell to be a prescribed value. CONSTITUTION:The read-out data from a selected memory cell in a memory cell array 7 are taken out as the voltage VDAT by a first bias potential setting circuit 1 and a first load circuit 4, and are compared and amplified with the reference voltage Vref taken out similarly through the dummy cell 37 by a sense amplifier 3, and the read-out data are outputted. The gate potential of the cell 37 is controlled by the gate potential control circuit 6, and is adjusted so as to become nearly intermediate between 1 level and 0 level of the voltage DAT. Thus, the memory access stable for the speed unbalance of the read of the data 1, 0 due to the dispersion in a cell current is performed. Further, when the reference voltage is controlled based on the relation between a source voltage and a threshold value, the upper limit of the source voltage is increased.</p> |
